Decentralized Bus Arbitration
This is a possible circuit for decentralized bus arbitration.
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    This is a diagram created with a freeware program named Digital Works. The
    small circles are output indicators, the small squares with circles in them
    are input indicators. It is possible to run this circuit inside Digital Works
    by setting values on the input indicators and then seeing the output indictors
    light up (they represent LEDs).
  
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    The device will set the Request From Device input. The device will
    determine that it needs the device. It asserts the line when it wants the
    bus and leaves it asserted until it is finished with the bus.
  
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    The S-R latch is a 1-bit memory that indicates that this device has made
    a request for the bus. The only way this memory can be set is if the Bus
    Request and Bus Busy lines are both negated, and the Request
    From Device line is asserted.
  
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    The delay makes the device wait to see if a higher priority device has made
    a simultaneous request for the bus. If after the delay, Grant In is
    still asserted, then this device sets the Bus Busy line and asserts
    the Grant To Device line. In the diagram it is represented as an output
    circle and then an input square. This allows me to interact with the circuit
    and to implement the delay myself when I simulate the circuit. In the actual
    circuit this would be a circuit that causes a specific delay.
  
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    Whenever the Bus Busy line is asserted by any device, it forces the
    device to assert the Grant Out line. This allows devices to get ready
    for the next bus cycle, when Bus Busy is negated. When Bus Busy
    is asserted, it prevents the S-R latch from being set.
  
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    Whenever the Bus Request line is asserted, it prevents the S-R latch
    from being set.
  
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    The Bus Busy and Bus Request have an output circle and an input
    square. Again, this is for the simulation. In the actual circuit, these would
    just be wired to other devices.
  
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    The tri-state buffers in the diagram make sure that the line can only flow
    in one direction. This is necessary to distinguish between a Bus Request
    or Bus Busy by another device and a Bus Request or Bus
    Busy for this device.
  
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    The S-R latch is reset under two possible conditions
    
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	Another device has asserted Bus Busy.
      
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	This device asserted Bus Busy, and Request From Device has
	been negated. When the device finishes with the bus, it deasserts Request
	From Device.